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ST49C101A-XX
High Frequency Clock Multiplier
January 1999 -3
FEATURES * Mask Programmable Analog Phase Locked Loop * Up to 200MHz Operation * Preprogrammed Multiplication Factors of 2, 3, 4, 5, 6, 8, 10 and 12X * Low Output Jitter * Replace Expensive High Frequency Oscillator * Crystal Oscillator Circuit On Chip * Low Power Single Supply 5V or 3.3V CMOS Technology * Small 8 Lead SOIC Package
APPLICATIONS * Voltage Controlled Crystal Oscillator (VCXO) * System Clock Multiplication in: * Computer Systems * Telecommunications Systems * Set-top Boxes
GENERAL DESCRIPTION The ST49C101A-XX is a mask programmable monolithic analog phase locked loop device, designed to replace existing high frequency crystal oscillator with a low frequency crystal. The high performance ST49C101A-XX provides low jitter clock output and operates up to 180 MHz. at 3.3 volts power supply. The ST49C101A-XX supports preprogrammed multiplication factors of 2,3,4,5,6,8,10 and 12X.
ORDERING INFORMATION
Part Number. ST49C101ACF8-01 ST49C101ACF8-03 ST49C101ACF8-05 ST49C101ACF8-06 ST49C101ACF8-07 ST49C101ACF8-08 ST49C101ACF8-09 ST49C101ACF8-10 ST49C101ACF8-13 ST49C101ACF8-15 Consult Factory Package 8 Lead 150 Mil Jedec SOIC 8 Lead 150 Mil Jedec SOIC 8 Lead 150 Mil Jedec SOIC 8 Lead 150 Mil Jedec SOIC 8 Lead 150 Mil Jedec SOIC 8 Lead 150 Mil Jedec SOIC 8 Lead 150 Mil Jedec SOIC 8 Lead 150 Mil Jedec SOIC 8 Lead 150 Mil Jedec SOIC 8 Lead 150 Mil Jedec SOIC Die Operating Temperature Range 0oC to 70oC 0oC to 70oC 0oC to 70oC 0oC to 70oC 0oC to 70oC 0oC to 70oC 0oC to 70oC 0oC to 70oC 0oC to 70oC 0oC to 70oC 0oC to 70oC
Rev. 2.20
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 * (510) 668-7000 * FAX (510) 668-7017
ST49C101A-XX
XTAL1
XTAL2
Oscillator Circuit
Programmable Counter B
Phase Detector
Charge Pump
Loop Filter
Voltage Controlled Oscillator
Programmable Counter C
Programmable Counter A
Voltage Reference Circuit
Output Buffer
CLOCK
VCC OE
Figure 1. Block Diagram
Rev. 2.20
2
ST49C101A-XX
XTAL1 OE AGND DGND
1 2 3 4
8 7 6 5
XTAL2 AVCC DVCC CLOCK
8 Pin SOIC (Jedec, 0.150")
PIN DESCRIPTION
Pin # 1 Symbol XTAL1 Type I Description Crystal or External Clock Input. A crystal can be connected to this pin and XTAL2 pin to generate internal phase locked loop reference clock. For external clock, XTAL2 is left open or used as buffered clock output. Clock Output Enable (Active high). CLOCK output is three stated when this pin is low. Connect to DVCC for normal operation. Analog Ground. Digital Ground. Programmed Output Clock. Positive Supply Voltage. Single +5 or 3.3 volts. Analog Supply Voltage. Single +5 or 3.3 volts. Crystal Output.
21 3 4 5 6 7 8
OE AGND DGND CLOCK DVCC AVCC XTAL2
I O O O I I O
Note: 1Has internal weak pull-up resistor
Rev. 2.20
3
ST49C101A-XX
MULTIPLICATION FACTOR AND OUTPUT FREQUENCY SELECTION The ST49C101A-XX contains an analog phase locked loop (PLL) circuit with digital closed loop dividers and a final output divider to achieve the desired dividing ratios for the clock output. The preprogrammed multiplication factor and output frequency are shown on Table 1. The accuracy of the output frequency produced by the ST49C101A-XX depends on its input frequency and multiplication factor. APPLICATIONS Two application examples are shown in Figure 2 and 3. Figure 2 shows a lower cost high frequency crystal oscillator circuit using the ST49C101-xx to increase the fundamental crystal frequency. The crystal Y1 is connected to XTAL1 and XTAL2 pins to use the internal oscillator circuit. The oscillator provides the reference clock to the PLL circuit for clock rate multiplication. Figure 3 shows a similar circuit using external clock input on XTAL1 pin instead. If a sinewave is used for external clock, it may be necessary to AC couple the signal with a 0.047uF capacitor to XTAL1 pin so that the internal circuitry can establish the proper bias. Also, keep the peak-topeak signal, at XTAL pin, above ground level (AGND) and below AVCC. As a general board layout rule, it is recommended to use two 0.01F bypass capacitors on DVCC and AVCC power supply pins, and put them as closely as possible to the chip. Table 1. Preprogrammed Options
ST49C101A-XX Factor Max. Output Frequency1 200 MHz 140 MHz 200 MHz 140 MHz 200 MHz 140 MHz 120 MHz 80 MHz 70 MHz 80 MHz 70 MHz 200 MHz 140 MHz 180 MHz VCC1
ST49C101A-01
12
5.0 V 3.3 V 5.0 V 3.3 V 5.0 V 3.3 V 5.0 or 3.3 V 5.0 V 3.3 V 5.0 V 3.3 V 5.0 V 3.3 V 3.3 V
ST49C101A-03
8
ST49C101A-05
6
ST49C101A-06
4
ST49C101A-07
3
ST49C101A-08
2
ST49C101A-09
5
ST49C101A-10
10
ST49C101A-13
8
180 MHz
3.3 V
ST49C101A-15
6
180 MHz
3.3 V
Notes
1
See AC electrical characteristics for maximum operating frequency.
Rev. 2.20
4
ST49C101A-XX
AVCC C1 0.01uF AGND 1 Parallel Cut Fundamental Resonance 20-30pF Load Y1 Crystal 8 2 DVCC U1 7
DVCC C2 0.01uF 6 DVCC DGND
AVCC XTAL1
ST49C101A-XX
XTAL2 OE AGND DGND 3 AGND 4 DGND CLOCK 5 CLOCK= Xtal Freq. x Option
Figure 2. High Frequency Crystal Oscillator Using a Crystal for Reference.
AVCC DVCC C1 0.01uF AGND U1 1 CLKin 7 6 AVCC DVCC XTAL1 C2 0.01uF DGND
ST49C101A-XX
8 XTAL2 DVCC 2 OE AGND 3 AGND CLOCK 5 CLOCK = CLKin x Option
DGND 4 DGND
Figure 3. High Frequency Clock Rate Multiplication Using External Clock.
Rev. 2.20
5
ST49C101A-XX
DC ELECTRICAL CHARACTERISTICS Test Conditions: TA = 25C, VCC = 5.0V + 10%, Operating Temperature Range 0C to 70C Unless Otherwise Specified
Symbol VIL VIH VOL VOH IIL IIH ICC RIN Parameter Input Low Level Input High Level Output Low Level Output High Level Input Low Current Input High Current Operating Current Input Pull-up Resistance 75 35 110 2.8 -100 1 50 155 2.0 0.5 Min. Typ. Max. 0.8 Unit V V V V A A mA k IOL = 8.0 mA IOH = 8.0 mA OE Pin only VIN=VCC, OE Pin only No Load. CLOCK=100MHz Conditions
AC ELECTRICAL CHARACTERISTICS Test Conditions: TA = 25C, VCC = 5.0V + 10%, Operating Temperature Range 0C to 70C Unless Otherwise Specified
Symbol T1,T2 T4 T4 + T5 T4 T4 + T5 T3 T3 TIN TOUT Parameter CLOCK Rise/Fall Time Duty Cycle 45 Min. Typ. 1.5 50 Max. 3 55 Unit ns % Conditions Load=30 pF, 0.2 VCC - 0.8 VCC VCC/2 Switch Point Up To 100MHz, Load = 20pF VCC/2 Switch Point 100-150MHz, 95 (AC Terminated) Of Period Of Period
Duty Cycle Jitter 1 Sigma Jitter Absolute Input Reference Frequency Output Frequency
40
50 +0.4 +1
60 +1 +3 30 200 200 200 120 80 80 200
% % % MHz MHz MHz MHz MHz MHz MHz MHz
12 50 50 50 50 25 25 50
20
ST49C101A-01 ST49C101A-03 ST49C101A-05 ST49C101A-06 ST49C101A-07 ST49C101A-08 ST49C101A-09
Rev. 2.20
6
ST49C101A-XX
DC ELECTRICAL CHARACTERISTICS Test Conditions: TA = 25C, VCC =3.3V +/- 10%, Operating Temperature Range 0C to 70C Unless Otherwise Specified
Symbol VIL VIH VOL VOH IIL IIH ICC RIN Parameter Input Low Level Input High Level Output Low Level Output High Level Input Low Current Input High Current Operating Current Input Pull-up Resistance 75 22 110 2.0 -100 1 40 155 2.0 0.5 Min. Typ. Max. 0.8 Unit V V V V A A mA k IOL = 4.0mA IOH = 4.0mA OE Pin Only VIN=VCC, OE Pin only No Load. CLOCK=100MHz Conditions
AC ELECTRICAL CHARACTERISTICS Test Conditions: TA = 25C, VCC =3.3V +/- 10%, Operating Temperature Range 0C to 70C Unless Otherwise Specified
Symbol T1, T2 T4 T4+T5 Parameter CLOCK Rise/Fall Time Duty Cycle 45 Min. Typ. 2 50 Max. 4 55 Unit ns % Conditions Load = 30 pF, 0.2 VCC - 0.8 VCC VCC/2 switch point up to 100MHz, Load = 30 pF T4 T4+T5 T3 T3 TIN TOUT Duty Cycle Jitter 1 Sigma Jitter Absolute Input Reference Frequency Output Frequency 12 50 50 50 50 50 25 25 50 25 25 25 40 50 + 0.4 +1 20 60 +1 +3 30 140 140 140 150 120 70 70 140 180 180 180 % % % MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz ST49C101A-01 ST49C101A-03 ST49C101A-05 ST49C101A-05 at VCC=3.13V min. ST49C101A-06 ST49C101A-07 ST49C101A-08 ST49C101A-09 ST49C101A-10 at VCC=3.13V min. ST49C101A-13 at VCC=3.13V min. ST49C101A-15 at VCC=3.13V min. VCC/2 switch point 100-150MHz, 95 (AC Terminated) Of Period Of Period
Rev. 2.20
7
ST49C101A-XX
ABSOLUTE MAXIMUM RATINGS

T2 Output Clock
T1
T5
T4
T3
Figure 4. Timing Diagram
Rev. 2.20
8

Supply Range Voltage at Any Pin Operating Temperature

7V GND-0.3V to VCC +0.3V 0C to +70C
Storage Temperature Package Dissipation
-40C to +150C 500mW
ST49C101A-XX
Rev. 2.20
9
ST49C101A-XX
NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for in accuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 1999 EXAR Corporation Datasheet January 1999 Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Rev. 2.20
10

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